The present disclosure relates to a technology for searching a memory for data that is held in the memory and, in particular, relates to a technology for reducing power consumption of a memory system such as a CAM (Content Addressable Memory) and so forth.
Pieces of communication equipment such as desktop PCs (Personal Computers), laptop PCs, tablet terminals, smartphones and other pieces of communication equipment are coupled together over a network. Communication traffic among these pieces of the communication equipment is more and more increased. Accordingly, it is requested for network equipment such as routers, switches and other pieces of network equipment to perform processing at a higher speed. A memory system that operates at a high speed is used in order to perform processing such as route search and so forth by such network equipment and so forth at a high speed.
For example, in a network router and so forth, routing of an IP (Internet Protocol) packet is performed. The network router includes, for example, the content addressable memory (CAM). The CAM is configured by a plurality of CAM cells. Search of the CAM is performed by activating a search line (SL) on the basis of a data array to be searched and deciding matching/mismatching with each entry in a CAM array. As a result of search, the CAM outputs an address of the entry that matches the search line. The CAM that the network router includes is configured to hold an IP address in the CAM cell. The network router performs routing by collating the address of each entry with an IP address that is held in the CAM cell on the basis of the IP address included in the IP packet that is input.
Since the CAM compares data of each entry in the CAM array with data to be searched in parallel for each entry in this way, high-speed data searching is attained. Although the CAM searches the plurality of entries in parallel and therefore high-speed searching is attained, high-speed search involves pre-charging and so forth to each match line (ML) and therefore the power consumption is comparatively increased. Therefore, various proposals have been made so far for the technology of reducing the power consumption of the system including the CAM. For example, Japanese Unexamined Patent Application Publication No. 2005-18942 describes an integrated circuit with associative memory function configured to reduce a load exerted on a control unit such as an NPU (Network Processor Unit), an ASIC (Application Specific Integrated Circuit) and so forth. In Japanese Unexamined Patent Application Publication No. 2005-18942, a technology for detecting matching between the data to be searched and data stored in the memory while shifting a search keyword.